Encryption Time Comparison of AES on FPGA and Computer

Akman Y., YERLİKAYA T.

3rd International Conference on Computational Science, Engineering and Information Technology, CCSEIT 2013, Konya, Türkiye, 7 - 09 Haziran 2013, cilt.225, ss.317-324, (Tam Metin Bildiri) identifier

  • Yayın Türü: Bildiri / Tam Metin Bildiri
  • Cilt numarası: 225
  • Doi Numarası: 10.1007/978-3-319-00951-3_30
  • Basıldığı Şehir: Konya
  • Basıldığı Ülke: Türkiye
  • Sayfa Sayıları: ss.317-324
  • Anahtar Kelimeler: Advanced Encryption Standard (AES), AES-128, Encryption, FPGA, Performance Analysis
  • Trakya Üniversitesi Adresli: Evet

Özet

Advanced Encryption Standard (AES), which is approved and published by Federal Information Processing Standard (FIPS), is a cryptographic algorithm that can be used to protect electronic data. The AES algorithm can be programmed in software or hardware. This paper presents encryption time comparison of the AES algorithm on FPGA and computer. In the study, Verilog HDL and C programming language is used on the FPGA and computer, respectively. The AES algorithm with 128-bit input and key length 128-bit (AES-128) was simulated on Xilinx ISE Design Suite 13.3. It was observed that, the AES algorithm runs on the FPGA faster than on a computer. We measured the time of encryption on FPGA and computer. Encryption time is 390ns of AES on FPGA and 11 μs of AES on a computer.